上海:021-51875830 北京:010-51292078
南京:4008699035 西安:029-86699670
武汉:027-50767718 成都:4008699035
深圳:4008699035 广州:4008699035

课程表 联系我 在线聊 报名 付款 我们 QQ聊 切换宽屏
嵌入式OS--4G手机操作系统
嵌入式硬件设计
Altium Designer Layout高速硬件设计
开发语言/数据库/软硬件测试
芯片设计/大规模集成电路VLSI
其他类
 
  Silicon-package-board co-design培训
   班级规模及环境--热线:4008699035 手机:15921673576( 微信同号)
       坚持小班授课,为保证培训效果,增加互动环节,每期人数限3到5人。
   上课时间和地点
上课地点:【上海】:同济大学(沪西)/新城金郡商务楼(11号线白银路站) 【深圳分部】:电影大厦(地铁一号线大剧院站)/深圳大学成教院 【北京分部】:北京中山学院/福鑫大楼 【南京分部】:金港大厦(和燕路) 【武汉分部】:佳源大厦(高新二路) 【成都分部】:领馆区1号(中和大道) 【沈阳分部】:沈阳理工大学/六宅臻品 【郑州分部】:郑州大学/锦华大厦 【石家庄分部】:河北科技大学/瑞景大厦 【广州分部】:广粮大厦 【西安分部】:协同大厦
最近开课时间(周末班/连续班/晚班)
Silicon-package-board co-design培训:2023年11月13日..(欢迎您垂询,视教育质量为生命!)
   实验设备
     ☆资深工程师授课

        ◆外地学员:代理安排食宿(需提前预定)
        ☆注重质量
        ☆边讲边练

        ☆合格学员免费推荐工作

        
        专注高端培训17年,曙海提供的课程得到本行业的广泛认可,学员的能力
        得到大家的认同,受到用人单位的广泛赞誉。

        ★实验设备请点击这儿查看★
   最新优惠
       ◆在读学生凭学生证,可优惠500元。
   质量保障

        1、培训过程中,如有部分内容理解不透或消化不好,可免费在以后培训班中重听;
        2、培训结束后免费提供半年的技术支持,充分保证培训后出效果;
        3、培训合格学员可享受免费推荐就业机会。

  Silicon-package-board co-design培训


第一阶段 Allegro AMS Simulator

Course Description

The Allegro? AMS Simulator course starts with the basics of entering a design for simulation and builds a solid foundation in the overall use of the software. You run DC Bias simulations, transient analysis simulations, and sweep simulations, allowing you to sweep component values, operating frequencies, or global parameters. You also have the opportunity to simulate several types of analog circuits, transformers, digital circuits, and mixed analog and digital circuits.

Learning Objectives

After completing this course you will be able to:

  • Enter a design for simulation
  • Run DC bias, DC sweep, and AC sweep analyses
  • Edit a stimulus and run a parametric analysis
  • Edit models, run a Monte Carlo analysis, create subcircuits, and create parts for simulation from a model or subcircuit definition
  • Create linear and non-linear transformers, and perform temperature, worst-case, and noise analysis
  • Apply analog behavioral modeling and run digital and mixed analog and digital simulation

Course Agenda

Note that this course can be tailored to better meet your needs?–?contact the Cadence training staff?for specifics.

Unit 1

  • Building a design for simulation
  • Setting up and running DC bias point analysis
  • Setting up and running DC and AC sweep analyses
  • Viewing simulation results in the probe window
  • Setting up sources and using markers
  • Creating and simulating a text netlist
  • Accessing the stimulus editor using VSTIM, ISTIM, and DIGSTIM Running transient analysis

Unit 2

  • Examining common simulation errors
  • Creating linear and non-linear transformers
  • Setting up and running parametric analysis
  • Creating a subcircuit
  • Performing temperature analysis
  • Configuring and running Monte Carlo analysis
  • Simulating with hierarchical blocks and symbols

Unit 3

  • Running simulations using analog behavioral modeling
  • Using digital components in a design
  • Combining analog and digital components in designs
  • Using performance analysis and creating goal functions
  • Setting up and running worst-case analysis
  • Setting up and running noise analysis
第二阶段 Allegro Design Entry HDL Front-to-Back Flow

Course Description

In this course, you create board-level schematic designs with Design Entry HDL. You explore the integration between Design Entry HDL and other tools in the design flow, including the Allegro? PCB Editor. You follow the design flow by creating a schematic and taking it all the way through board layout.

Although board layout is introduced as part of the front-to-back flow, this is not a board layout course. Also, schematic or footprint library development is not included in this course. See the Related Courses below.

Learning Objectives

After completing this course, you will be able to:

  • Set up new projects
  • Create a flat, multisheet design
  • Check the design
  • Use part tables
  • Package a design
  • Create and customize a bill of materials
  • Build a hierarchical design
  • Use schematic properties to control part placement
  • Use the Constraint Manager to define high-speed routing requirements in Design Entry HDL
  • Transfer the design to the PCB Editor
  • Place parts manually
  • Autoroute with the PCB Router
  • Compare the schematic and layout
  • Synchronize design differences
  • Incorporate engineering changes
  • Link projects together in a team-design scenario
  • Reuse a hierarchical block and associated layout in another design

Course Sessions

Note that this course can be tailored to better meet your needs –?contact the Cadence training staff?for specifics.

Session 1

  • Getting Started
  • Project Setup

Session 2

  • Design Entry and Packaging

Session 3

  • Hierarchical and Team Design

Session 4

  • Design Rules
  • Rules-Driven Layout

Session 5

  • Engineering Changes